A. Field of the Invention
The present invention relates to a fault position analysis method and a fault position analysis device for a semiconductor device, in which a fault position of the semiconductor device using an N-doped SiC substrate is analyzed by an Optical Beam Induced Resistance Change (OBIRCH) method.
B. Description of the Related Art
Conventionally, the fault positions of a semiconductor device have been specified by a liquid crystal method, an emission microscope, the OBIRCH method, and the like. Among them, the OBIRCH method is an effective method of detecting leakage defects such as disconnections, short circuits, and contact fault, in which the defect portions are irradiated with a laser beam to be locally heated and a resulting change in resistance is detected, thereby specifying the defect position.
As an analysis technique of the OBIRCH method, JP 11-118887 A described below discloses an improved technique in a constant current type beam irradiating, heating, and resistance-change-measuring device which scans and irradiates with a laser beam a sample such as a semiconductor integrated circuit energized by a predetermined constant current, and measures a change in a resistance value of the sample according to the irradiating as a change in a voltage value so as to examine a defect place of the sample.
In addition, JP 2004-264030 A described below discloses a beam irradiating, heating, and resistance-change-measuring device which scans and irradiates with a laser beam a sample energized by a current, and examines a defect place of the sample based on a change in the resistance value of the sample according to the irradiating, in which a magnetic field detecting device is provided on a power line supplying a current to the sample to measure an amount of change in a current flowing to the sample based on a change in magnetic field on the power line which is detected by the magnetic field detecting device.
Furthermore, JP 2009-236651 A described below discloses a defect examining device including a setting unit which sets a second irradiating target portion away from a first irradiating target portion by a predetermined distance based on a thermal distribution in a sample generated when the first irradiating target portion of the sample is irradiated with the laser beam, and an examining unit which irradiates the first irradiating target portion set by the setting unit with the laser beam to examine the first irradiating target unit and, after the examining of the first irradiating target unit, irradiates the second irradiating target portion set by the setting unit with the laser beam to examine the second irradiating target portion.
On the other hand, since the semiconductor device such as a power semiconductor device is configured of metal films formed over the entire surface of an active portion of a front side of the device, in a case where the examination is performed by the OBIRCH method, there is a need to emit a laser beam to the device from the rear surface side thereof to irradiate the defect in the vicinity of the front surface of the device. Likewise, in a case where the device is irradiated with the laser beam from the rear surface side thereof, since there is a need to employ a laser beam having permeability to the Si substrate, a laser beam having a wavelength of 1360 nm, which is equal to or lower than the band gap of Si is used.
In recent years, in a semiconductor device such as the power semiconductor device, a wide-gap semiconductor, for example, SiC and GaN, having a good performance in a withstanding voltage are used, and particularly a SiC semiconductor draws attention as a next-generation semiconductor. The SiC semiconductor device using an N-doped SiC substrate is largely employed.
However, in a case where a sample is a SiC semiconductor device employing the N-doped SiC substrate is electrically defective and thus a leakage current occurs, when measured by a conventional analysis device through the OBIRCH method, a position at which a resistance change occurs is not able to be found, so that it can be seen that the defect position is not able to be specified.
Therefore, a fault position analysis method and a fault position analysis device for a semiconductor device are desired through which a fault position of the SiC semiconductor device can be analyzed and specified through the OBIRCH method.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.